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Signal Integrity - Simulation


INR 22000


6 - 8 Weeks

About the Course

• What is a transmission line
• Transmission line effects
• Printed circuit boards
• Drivers, receivers, Zo
• Board interconnect delay
• Termination
• Topologies
• Package parasitics
• Differential pair
• Crosstalk
• PCB power integrity
• Reference planes
• Connectors
• Vias
• AC losses
• Fiber Weave Effect - FWE
• Trace surface roughness
• S Parameters
• Testing issues
• IBIS models
• Layout issues

Your Instructor


17+ years experienced Signal Integrity/Platform Integrity Engineer and a Team Leader for 20 years with a demonstrated history of working in the product and semiconductor industries. An expert in Building, Leading and Managing Signal Integrity teams. Skilled in Signal Integrity (Pre-Layout and Post Layout Simulation) for product design of mobile computing products (Tablets/2-in-1’s, smartphone, Ultrabook, convertibles), Customer Reference Board designs based on Intel’s Core processors, High-speed PCB design, and RF & Microwave Circuit Design.

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